Transistor with reduced charge carrier mobility
US7915681B2 · kind B2 · utility
3Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2007 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Sep 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device includes a first transistor including a fin and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor. In a method, the fin of the first transistor is treated to have a lower charge carrier mobility than the fin of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.