Linearity improvements of semiconductor substrate using passivation
US7915706B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2008 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Jul 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
The present invention relates to using a potentially trap-rich layer, such as a polycrystalline Silicon layer, over a passivation region of a semiconductor substrate or a Silicon-on-insulator (SOI) device layer to substantially immobilize a surface conduction layer at the surface of the semiconductor substrate or SOI device layer at radio frequency (RF) frequencies. The potentially trap-rich layer may have a high density of traps that trap carriers from the surface conduction layer. The average release time from the traps may be longer than the period of any present RF signals, thereby effectively immobilizing the surface conduction layer, which may substantially prevent capacitance and inductance changes due to the RF signals. Therefore, harmonic distortion of the RF signals may be significantly reduced or eliminated. The semiconductor substrate may be a Silicon substrate, a Gallium Arsenide substrate, or another substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.