Device for implementing a sum of products expression
US7917569B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2005 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Jul 16, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5443
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device for implementing a sum-of-products expression includes a first set of 2-input Shift-and-Add (2SAD) blocks receiving a coefficient set/complex sum-of-products expression for generating a first set of partially optimized expression terms by applying recursive optimization therein, a second set of 1-input Shift-and-Add (1SAD) blocks receiving response from the 2SAD blocks for generating a second set of partially optimized expression terms by applying vertical optimization therein, a third set of 2SAD blocks receiving recursively and vertically optimized response from the first set of 2SAD block and the second set of 1SAD blocks for generating a third set of partially optimized expression terms by applying horizontal optimization therein, a fourth set of 2SAD blocks receiving response from the blocks for generating a fourth set of partially optimized expression terms by applying decomposition and factorization, and a fifth set of 2SAD blocks receiving response from the fourth set of 2SAD blocks, for generating the final output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.