Patent · US Active

Semiconductor devices and methods of manufacture thereof

US7919364B2 · kind B2 · utility

14Cited by
5References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 9, 2007
Grant dateApr 5, 2011
Priority date
Expiry dateMay 14, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/215

Abstract

A FinFET and methods for its manufacture are provided. The method of the invention provides an elegant process for manufacturing FinFETs with separated gates. It is compatible with a wide range of dielectric materials and gate electrode materials, providing that the gate electrode material(s) can be deposited conformally. Provision of at least one upstanding structure (or “dummy fin”) (40) on each side of the fin (4) serves to locally increase the thickness of the gate electrode material layer (70). In particular, as the shortest distance between each upstanding structure (40) and the respective side of the fin (4) is arranged in accordance with the invention to be less than twice the thickness of the conformal layer, the thickness of the gate electrode material layer (70) all the way across this distance between each upstanding structure (40) and the fin (4) is increased relative to that over planar regions of the substrate (2). Thus, following an anisotropic etch to remove gate electrode material (70) overlying the fin (4), some material nevertheless remains between the upstanding structures and the fin. Thus, an enlarged area of gate electrode material is formed for use as a gat…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.