Methods for fabricating fine line/space (FLS) routing in high density interconnect (HDI) substrates
US7919408B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Apr 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating fine line and space routing described. The method includes providing a substrate having a dielectric layer and a seed layer disposed thereon. An anti-reflective coating layer and a photo-resist layer are then formed above the seed layer. The photo-resist layer and the anti-reflective coating layer are patterned to form a patterned photo-resist layer and a patterned anti-reflective coating layer, to expose a first portion of the seed layer, and to leave covered a second portion of the seed layer. A metal layer is then formed on the first portion of the seed layer, between features of the patterned photo-resist layer and the patterned anti-reflective coating layer. The patterned photo-resist layer and the patterned anti-reflective coating layer are subsequently removed. Then, the second portion of the seed layer is removed to provide a series of metal lines above the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.