Method for forming fine patterns in semiconductor device
US7919414B2 · kind B2 · utility
1Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2007 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Sep 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0337
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming fine patterns in a semiconductor device includes forming an etch stop layer and a sacrificial layer over an etch target layer, forming photoresist patterns over the sacrificial layer, etching the sacrificial layer by using the photoresist patterns as an etch barrier to form sacrificial patterns, forming spacers on both sidewalls of the sacrificial patterns, removing the sacrificial patterns, and etching the etch stop layer and the etch target layer by using the spacer as an etch barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.