Semiconductor package having a crack-propagation preventing unit
US7919833B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2008 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Apr 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There are provided a semiconductor package comprising: a semiconductor substrate including an integrated circuit unit, and a crack-propagation preventing unit at least partially formed around a peripheral of the integrated circuit unit of the semiconductor substrate and filled with a heterogeneous material different from a material of the semiconductor substrate, and a method of fabricating the semiconductor package, comprising: at least partially forming a trench around the peripheral of the integrated circuit unit of the semiconductor substrate, and filling the trench with a heterogeneous material different from that of the semiconductor substrate. In accordance with the present invention, the structural and mechanical strength and durability of the semiconductor package, specifically, the wafer level semiconductor package, are improved and the reliability of the product is significantly improved. Furthermore, a fail rate including crack/chipping during a subsequent mounting process lowers, to improve the yield and reduce the whole manufacturing cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.