Microprocessor with substrate bias clamps
US7920019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2008 |
| Grant date | Apr 5, 2011 |
| Priority date | — |
| Expiry date | Apr 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
Abstract
A microprocessor including a substrate bias rail providing a bias voltage during a first operating mode, a supply node providing a core voltage, a clamp device coupled between the bias rail and the supply node, and control logic. The control logic turns on the clamp device to clamp the bias rail to the supply node during a second operating mode and turns off the clamp device during the first operating mode. The clamp devices may be implemented with P-channel and N-channel devices. Level shift and buffer circuits may be provided to control the clamp devices based on substrate bias voltage levels. The microprocessor may include a substrate with first and second areas each including separate substrate bias rails. The control logic separately turns on and off clamp devices to selectively clamp the substrate bias rails in the first and second areas based on various power modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.