Suppressing register renaming for conditional instructions predicted as not executed
US7925868B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | May 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Within a data processing system including a register renaming mechanism, register renaming for some conditional instructions which are predicted as not-executed is suppressed. The conditional instructions which are subject to such suppression of renaming may not be all conditional instructions, but may be those which are known to consume a particularly large number of physical registers if they are subject to renaming A conditional load multiple instruction in which multiple registers are loaded with new data values taken from memory in response to a single instruction is an example where the present technique may be used, particularly when one of the registers loaded is the program counter and accordingly the instruction is a conditional branch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.