Dual independent and shared resource vector execution units with shared register file
US7926009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | May 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is generally related to integrated circuit devices, and more particularly, to methods, systems and design structures for the field of image processing, and more specifically to vector units for supporting image processing. A dual vector unit implementation is described wherein two vector units are configured receive data from a common register file. The vector units may independently and simultaneously process instructions. Furthermore, the vector units may be adapted to perform scalar operations thereby integrating the vector and scalar processing. The vector units may also be configured to share resources to perform an operation, for example, a cross product operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.