Semiconductor package and method therefor
US7927927B2 · kind B2 · utility
37Cited by
99References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2001 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Jan 14, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package substrate (11) has an array of package sites (13, 14, 16, and 21) that are substantially identical. The entire array of package sites (13, 14, 16, and 21) is covered by an encapsulant (19). The individual package sites (13, 14, 16, and 21) are singulated by sawing through the encapsulant (19) and the underlying semiconductor package substrate (11).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.