Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods
US7928425B2 · kind B2 · utility
108Cited by
47References
27Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 23, 2008 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Jul 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A semiconductor device which may include a semiconductor layer, and a superlattice interface layer therebetween. The superlattice interface layer may include a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.