Speculative memory prefetch
US7930485B2 · kind B2 · utility
10Cited by
10References
20Claims
0Family size
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Key dates
| Filing date | Jul 19, 2007 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Oct 26, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for pre-fetching data from system memory. A multi-core processor accesses a cache hit predictor concurrently with sending a memory request to a cache subsystem. The predictor has two tables. The first table is indexed by a portion of a memory address and provides a hit prediction based on a first counter value. The second table is indexed by a core number and provides a hit prediction based on a second counter value. If neither table predicts a hit, a pre-fetch request is sent to memory. In response to detecting said hit prediction is incorrect, the pre-fetch is cancelled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.