Enhancement-mode III-N devices, circuits, and methods
US7932539B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2006 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Jan 1, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A method of fabricating AlGaN/GaN enhancement-mode heterostructure field-effect transistors (HFET) using fluorine-based plasma immersion or ion implantation. The method includes: 1) generating gate patterns; 2) exposing the AlGaN/GaN heterostructure in the gate region to fluorine-based plasma treatment with photoresist as the treatment mask in a self-aligned manner; 3) depositing the gate metal to the plasma treated AlGaN/GaN heterostructure surface; 4) lifting off the metal except the gate electrode; and 5) high temperature post-gate annealing of the sample. This method can be used to shift the threshold voltage of a HFET toward a more positive value, and ultimately convert a depletion-mode HFET to an enhancement-mode HFET (E-HFET).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.