Singulated semiconductor package
US7932587B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 7, 2007 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Nov 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18301
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a singulated semiconductor package having a leadframe, a chip electrically coupled to the leadframe, encapsulating material covering the chip and a portion of the leadframe, and a material layer disposed over opposing ends of the leadframe. The leadframe includes a first face and an opposing second face, the first and second faces extending between opposing ends of the leadframe, where the second face configured to electrically couple with a circuit board. The chip is electrically coupled to the first face. The encapsulating material covers the chip and the first face of the leadframe. The material layer is configured to improve solderability of the singulated semiconductor package to the circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.