Patent · US Active

Inverting flip-flop for use in field programmable gate arrays

US7932745B2 · kind B2 · utility

4Cited by
14References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 10, 2010
Grant dateApr 26, 2011
Priority date
Expiry dateSep 10, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/1778
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A flip-flop for use in a field programmable gate array integrated circuit device is disclosed. The flip-flop comprises a data output terminal coupled to a first programmable routing element, a data input terminal coupled to a second programmable routing element, and a clock input terminal, wherein a signal appearing at the data output terminal in response to a signal applied to the clock input terminal has the opposite logical polarity with respect to the corresponding logical signal applied to the data input terminal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.