Reshuffled communications processes in pipelined asynchronous circuits
US7934031B2 · kind B2 · utility
8Cited by
30References
16Claims
0Family size
Assignee
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Key dates
| Filing date | May 11, 2006 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | May 11, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3869
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An asynchronous logic family of circuits which communicate on delay-insensitive flow-controlled channels with 4-phase handshakes and 1 of N encoding, compute output data directly from input data using domino logic, and use the state-holding ability of the domino logic to implement pipelining without additional latches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.