Patent · US Active

Method, system and computer program product for preventing lockout and stalling conditions in a multi-node system with speculative memory fetching

US7934059B2 · kind B2 · utility

5Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 29, 2008
Grant dateApr 26, 2011
Priority date
Expiry dateAug 10, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/507
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of preventing lockout and stalling conditions in a multi-node system having a plurality of nodes which includes initiating a processor request to a shared level of cache in a requesting node, performing a fabric coherency establishment sequence on the plurality of nodes, issuing a speculative memory fetch request to a memory, detecting a conflict on one of the plurality of nodes and communicating the conflict back to the requesting node within the system, canceling the speculative memory fetch request issued, and repeating the fabric coherency establishment sequence in the system until the point of conflict is resolved, without issuing another speculative memory fetch request. The subsequent memory fetch request is only issued after determining the state of line within the system, after the successful completion of the multi-node fabric coherency establishment sequence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.