Secured coprocessor comprising means for preventing access to a unit of the coprocessor
US7934265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2006 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Feb 24, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a coprocessor comprising a calculation unit for executing a command, and a securization device for monitoring the execution of the command and supplying an error signal having an active value as soon as the execution of the command begins and an inactive value at the end of the execution of the command, if no abnormal progress in the execution of the command has been detected. The coprocessor further comprises means for preventing access to at least one unit of the coprocessor, while the error signal is on the active value. Application is provided particularly but not exclusively to the protection of integrated circuits for smart cards against attacks by fault injection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.