Frederic Bancel
33Patents
4h-index
6Co-inventors
52Inventor score
Filing activity: Jan 24, 2005 → Nov 8, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7954153B2 | Secured coprocessor comprising an event detection circuit | Physics | 10 | Active |
| US7584386B2 | Microprocessor comprising error detection means protected against an attack by error injection | Physics | 7 | Active |
| US7788506B2 | Method and device for protecting a memory against attacks by error injection | Physics | 6 | Active |
| US8495734B2 | Method and device for detecting an erroneous jump during program execution | Physics | 5 | Active |
| US8330495B2 | Countermeasure method and device for protecting data circulating in an electronic component | Electricity | 4 | Active |
| US7904775B2 | Microprocessor comprising signature means for detecting an attack by error injection | Physics | 4 | Active |
| US8341475B2 | Microprocessor comprising signature means for detecting an attack by error injection | Physics | 3 | Active |
| US8412988B2 | Fault injection detector in an integrated circuit | Physics | 3 | Active |
| US8466727B2 | Protection against fault injections of an electronic circuit with flip-flops | Electricity | 3 | Active |
| US7577886B2 | Method for testing an electronic circuit comprising a test mode secured by the use of a signature, and associated electronic circuit | Physics | 3 | Active |
| US8359481B2 | Secured coprocessor comprising an event detection circuit | Physics | 2 | Active |
| US7768318B2 | Detection of a disturbance in the state of an electronic circuit flip-flop | Physics | 2 | Active |
| US8412996B2 | Method and device for checking the integrity of a logic signal, in particular a clock signal | Physics | 2 | Active |
| US7512852B2 | Protecting an integrated circuit test mode | Physics | 2 | Expired |
| US7934265B2 | Secured coprocessor comprising means for preventing access to a unit of the coprocessor | Physics | 2 | Active |
| US9021316B2 | Register protected against fault attacks | Physics | 2 | Active |
| US7694197B2 | Integrated circuit comprising a test mode secured by detection of the state of a control signal | Physics | 2 | Active |
| US7747935B2 | Method and device for securing the reading of a memory | Physics | 2 | Active |
| US7568140B2 | Integrated circuit having configurable cells and a secured test mode | Physics | 1 | Active |
| US7308635B2 | Integrated circuit comprising a test mode secured by initialization of the test mode | Physics | 1 | Expired |
| US7484152B2 | Securing the test mode of an integrated circuit | Physics | 1 | Active |
| US7478293B2 | Method of securing the test mode of an integrated circuit via intrusion detection | Physics | 1 | Expired |
| US7921342B2 | Integrated circuit comprising a test mode secured by the use of an identifier, and associated method | Physics | 1 | Active |
| US7725786B2 | Protecting an integrated circuit test mode | Physics | 1 | Active |
| US9483663B2 | Countermeasure method for protecting stored data | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.