Die scale strain gauge
US7934430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2007 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Dec 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01L1/2287
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A chip with resistive, metallic strain gauges distributed on surfaces on and buried within the chip. Also, vertically arranged vias and vertical thin film resistive strain gauges are described. The resistive strain gauges can be multiplexed wherein strain can be measured across the topology of the chip in each of the top, bottom and buried layers and any vertical strain. The resistive strain gauges may be in serpentine patterns and may be arranged on via or on vertical edges of grooves that extend from an upper or lower surface of the chip to buried layers. In this fashion, the distributed strain gauges may be used to map the strain throughout the body of a chip. A Kelvin bridge may be used to measure the strain, but other such measuring techniques and devices may be used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.