Method of forming fine patterns of semiconductor devices using double patterning
US7935635B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2008 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Dec 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming fine patterns of semiconductor device according to an example embodiment may include forming a plurality of multi-layered mask patterns by stacking first mask patterns and buffer mask patterns on an etch film to be etched on a substrate, forming, on the etch film, second mask patterns in spaces between the plurality of multi-layered mask patterns, removing the second mask patterns to expose upper surfaces of the first mask patterns, and forming the fine patterns by etching the etch film using the first and second mask patterns as an etch mask. This example embodiment may result in the formation of diverse dimensions at diverse pitches on a single substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.