Patent · US Active

Wafer level CSP packaging concept

US7939916B2 · kind B2 · utility

16Cited by

7References

8Claims

0Family size

Assignee

Analog Devices, Inc. · US

Inventors

Alan J. O'Donnell · Limerick, IE
Oliver Kierse · Ennis, IE
Thomas M. Goida · Windham, US

Key dates

Filing date	Jan 25, 2007
Grant date	May 10, 2011
Priority date	—
Expiry date	Aug 3, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/10158
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An electronics package includes a wafer die substrate containing electronic circuits and having a top surface and a bottom surface. A top protective layer is substantially thinner than the substrate and covers the top surface. A bottom protective layer is substantially thinner than the substrate and covers the bottom surface. Circuit contacts are distributed about the bottom protective layer for electrically coupling the substrate electronic circuits to external electronic circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.