Circuits and method for bypassing a static configuration in a programmable logic device to implement a dynamic multiplexer
US7940082B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 21, 2008 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Feb 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuit for selectively using static or dynamic select signals inside an integrated circuit, including a first transistor connecting a static select signal to a dynamic route select output line when a dynamic select CRAM signal is at a first logical level, and a second transistor connecting a dynamic select signal to the dynamic route select output line when the dynamic select CRAM signal is at a second logical level. The circuit further comprises a dynamic select CRAM register that contains a logical value to indicate whether the dynamic select signal bypasses the static select signal. The dynamic select CRAM register is connected to the second transistor gate, and to an inverter whose output is connected to the first transistor gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.