Patent · US Active

Output circuit with overshoot-reducing function

US7940093B2 · kind B2 · utility

2Cited by

2References

9Claims

0Family size

Assignee

Etron Technology, Inc. · TW

Inventors

Chun Shiah · Hsinchu, TW
Chi-Fa Lien · Hsinchu, TW
Sen-Fu Hong · Tainan, TW

Key dates

Filing date	Oct 6, 2008
Grant date	May 10, 2011
Priority date	—
Expiry date	Oct 6, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH03K5/08
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Output circuit with reduced overshoot includes input end, output end, a circuit composed of PMOS and NMOS, rising and falling edge trigger bias circuits. The rising and falling edge trigger bias circuits output biasing voltages to the output end for clamping the voltage of the output signals respectively according to the rising edge and the falling edge of the input signal. In this way, the overshoot of the output signal is reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.