Power semiconductor arrangement including conditional active clamping
US7940503B2 · kind B2 · utility
5Cited by
3References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 27, 2008 |
| Grant date | May 10, 2011 |
| Priority date | — |
| Expiry date | Feb 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power semiconductor arrangement including conditional active clamping (CAC). One embodiment includes a power semiconductor arrangement. A controllable power semiconductor switch includes a load path. A driver unit for switching the load path to either an ON-state or an OFF-state. An active clamping (AC) unit configured to switch the load path in the ON-state if the voltage affecting the controllable power semiconductor switch is higher than or equal to an allowable voltage. A switching unit includes a control input, and configured to activate and/or to deactivate the AC unit dependent on a signal applied to the control input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.