CMOS devices with different metals in gate electrodes using spin on low-k material as hard mask

US7943453B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Bernd Kastenmeier · Austin, US
• Byoung Hun Lee · Wappingers Falls, US
• Naim Moumen · Walden, US
• Theodorus E. Standaert · Clifton Park, US

Key dates

• Filing date: Dec 20, 2007
• Grant date: May 17, 2011
• Expiry date: Jul 9, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

A semiconductor structure and a method of forming the same. The semiconductor structure includes a semiconductor substrate, a gate dielectric layer on top of the semiconductor substrate. The structure also includes a first metal containing region on top of the gate dielectric layer. The structure also includes a second metal containing region on top of the gate dielectric layer wherein the first and second metal containing regions are in direct physical contact with each other. The structure further includes a gate electrode layer on top of both the first and second metal containing regions and the gate electrode layer is in direct physical contact with both the first and second metal containing regions. The structure further includes a patterned photoresist layer on top of the gate electrode layer.