Method of making an interconnect structure
US7943509B2 · kind B2 · utility
1Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Mar 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1031
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A damascene process is described using a copper fill process to fill a trench (12). The copper fill (20) is started with a deposited seed layer which includes (5) copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier (24) at the surface of the copper fill (20). Air gaps (26) may be created in the same annealing process. The process may be used to form a multilayer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.