Patent · US Active

Method and apparatus to detect manufacturing faults in power switches

US7944285B1 · kind B1 · utility

5Cited by

15References

10Claims

0Family size

Assignee

Cadence Design Systems, Inc. · US

Inventors

Senthil Arasu Thirunavukarasu · Rawatsar, IN
Bambuda Chen Chien Leung · San Francisco, US
Shaleen Bhabu · New Delhi, IN
Vivek Chickermane · Ithaca, US

Key dates

Filing date	Apr 9, 2008
Grant date	May 17, 2011
Priority date	—
Expiry date	Jun 25, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/025
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit is provided that comprises a power switch that includes a control terminal and that is coupled between a power source node and a power sink node; first data storage circuit includes a data storage input and a data storage output, wherein the data storage output is coupled to the power switch control terminal; and a second data storage circuit includes a data storage input and a data storage output, wherein the data storage input is coupled to the power sink node.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.