Method and structure for asynchronous skip-ahead in synchronous pipelines
US7945765B2 · kind B2 · utility
10Cited by
11References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 31, 2008 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Mar 10, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3873
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus includes a plurality of stages serially interconnected as a pipeline to perform sequential processings on input operands. A shortening circuit associated with at least one stage of the pipeline recognizes when one or more of input operands for the stage has been predetermined as appropriate for shortening and execute the shortening when appropriate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.