Pin-type chip tooling
US7946331B2 · kind B2 · utility
28Cited by
199References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2006 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Dec 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S2301/176
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus for use with multiple chips having multiple posts as to engage at least a portion of a surface of one of the multiple chips, a frame configured to releasably constrain each of the posts so that, when unconstrained, each individual post can contact an individual chip and, when constrained, will allow a uniform vertical force to be applied to the chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.