Memory management techniques selectively using mitigations to reduce errors
US7949903B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2008 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Jul 4, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for performing memory management to mitigate memory errors. In accordance with the principles described herein, a memory management module may be implemented that acts in different modes of operation for each of one or more software modules issuing requests for performance of memory operations to the memory management module. In one mode of operation, one or more mitigation actions may be performed by the memory management module in addition to or instead of the memory operation requested by the calling software module, such that the memory operations are performed in accordance with the mitigation actions. These mitigation actions may serve to reduce a likelihood of a memory error negatively affecting the calling software module. In another mode of operation, the memory management module performs memory operations as requested, without performing mitigation actions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.