David Grant
20Patents
7h-index
33Co-inventors
69Inventor score
Filing activity: Apr 10, 1969 → Dec 21, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7533068B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 265 | Active |
| US8008942B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 178 | Active |
| US8283943B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 98 | Active |
| US8453027B2 | Similarity detection for error reports | Electricity | 50 | Active |
| US9069928B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 32 | Active |
| US8686751B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 28 | Active |
| US9727527B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 9 | Active |
| US10691633B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 6 | Active |
| US10346349B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 6 | Active |
| US4087815A | Hybrid digital-optical radar signal processor | Physics | 5 | Expired |
| US7937625B2 | Evaluating effectiveness of memory management techniques selectively using mitigations to reduce errors | Physics | 5 | Active |
| US10140248B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 4 | Active |
| US7823006B2 | Analyzing problem signatures | Physics | 4 | Active |
| US11526463B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 3 | Active |
| US11093440B2 | Analog processor comprising quantum devices | Performing Operations; Transporting | 3 | Active |
| US7949903B2 | Memory management techniques selectively using mitigations to reduce errors | Physics | 2 | Active |
| US8140892B2 | Configuration of memory management techniques selectively using mitigations to reduce errors | Physics | 2 | Active |
| US8417999B2 | Memory management techniques selectively using mitigations to reduce errors | Physics | 1 | Active |
| US10180894B2 | Identifying a stack frame responsible for resource usage | Physics | 0 | Active |
| US12072845B2 | Systems and methods for pair-wise delta compression | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.