Method for simultaneously tensile and compressive straining the channels of NMOS and PMOS transistors respectively

US7951659B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Younes Lamrani · Bourg-en-Bresse, FR
• Jean-Charles Barbe · Seyssinet-Pariset, FR
• Marek Kostrzewa · Grenoble, FR

Key dates

• Filing date: Jul 17, 2009
• Grant date: May 31, 2011
• Expiry date: Nov 1, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01

Abstract

A method of forming a microelectronic device comprising, on a same support: at least one semi-conductor zone strained according to a first strain, and at least one semi-conductor zone strained according to a second strain, different to the first strain, comprising: the formation of semi-conductor zones above a pre-strained layer, then trenches extending through the thickness of the pre-strained layer, the dimensions and the layout of the semi-conductor zones as a function of the layout and the dimensions of the trenches being so as to obtain semi-conductor zones having a strain of the same type as that of the pre-strained layer and semi-conductor zones having a strain of a different type to that of the pre-strained layer.