Marek Kostrzewa
5Patents
2h-index
9Co-inventors
33Inventor score
Filing activity: Jun 21, 2007 → Jul 17, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7422958B2 | Method of fabricating a mixed substrate | Electricity | 12 | Active |
| US7947564B2 | Method of fabricating a mixed microtechnology structure and a structure obtained thereby | Performing Operations; Transporting | 2 | Active |
| US8809964B2 | Method of adjusting the threshold voltage of a transistor by a buried trapping layer | Electricity | 1 | Active |
| US7879690B2 | Method of fabricating a microelectronic structure of a semiconductor on insulator type with different patterns | Electricity | 0 | Active |
| US7951659B2 | Method for simultaneously tensile and compressive straining the channels of NMOS and PMOS transistors respectively | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.