Patent · US Active

Scribe line layout design

US7952167B2 · kind B2 · utility

8Cited by
52References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 27, 2007
Grant dateMay 31, 2011
Priority date
Expiry dateOct 12, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A scribe line layout design to reduce the damage caused by sawing the wafer is presented. An embodiment comprises metal plates located within the scribe lines and at least partially within the junctions of the scribe lines. Each of these metal plates has one or more slots to help relieve the pressure. Alternatively, instead of metal plates, grooves that may be filled with metal could be placed into the scribe lines. These metal plates could also be used concurrently with a seal ring for better protection during sawing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.