Lead frame, semiconductor package including the lead frame and method of forming the lead frame
US7952175B2 · kind B2 · utility
3Cited by
1References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2008 |
| Grant date | May 31, 2011 |
| Priority date | — |
| Expiry date | Jun 4, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a lead frame and a semiconductor package including the same. The lead frame includes a first lead frame portion including a plurality of first leads; an adhesive member disposed such that the first leads are adhered to one surface of the adhesive member; and a second lead frame portion including a plurality of second leads disposed such that the second leads are adhered to the other surface of the adhesive member, wherein the second leads are arranged so as not to overlap with the first leads. The lead frame may optionally include a die pad on which a semiconductor chip is installed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.