Patent · US Active

Method and circuit arrangement for calibration of a sampling control signal which influences the sampling time of a received signal from a sampling phase selection element

US7957455B2 · kind B2 · utility

6Cited by

15References

22Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Steffen Paul · Baierbrunn, DE
Thomas Ruprich · Birkenfeld, DE
Dietmar Wenzel · Höchst im Odenwald, DE

Key dates

Filing date	Jul 23, 2004
Grant date	Jun 7, 2011
Priority date	—
Expiry date	Apr 6, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH04B1/7115
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A discrete sampling control signal, which influences the sampling time, from a sampling phase selection element is calibrated by definition of quantization intervals for a sampling time error signal. For this purpose, a received signal is shifted through a series of time shifts τi in the signal path upstream of the sampling phase selection element. The sampling time errors ei associated with the respective time shifts τi are measured. The quantization steps of the sampling control signal that are suitable for the sampling phase selection element are then determined from the relationship obtained between τi and ei.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.