Patent · US Active

Hard/soft cooperative verifying simulator

US7957950B2 · kind B2 · utility

1Cited by
3References
8Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 28, 2008
Grant dateJun 7, 2011
Priority date
Expiry dateJul 11, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/33
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A hard/soft cooperative verifying simulator is based on a SystemC simulator, and provides the capability of reducing overhead of context switching control thereby to shorten processing time. Time keepers for controlling simulation times of a plurality of threads are provided corresponding to the threads generated as simulation models for hardware and software. Each of the time keepers has a variable which holds a simulation time for each thread, a variable which holds a summation time, and a break request queue which stores a break time and its corresponding break method therein. The time keeper manages both variables and the queue in response to six types of method invocations from the thread, and invokes a wait function of the SystemC simulator when necessary. It is thus possible to reduce the number of times that a wait function invocation is performed, and shorten the entire processing time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.