Circuit arrangement, electronic mechanism, electrical turn out and procedures for the operation of one circuit arrangement

US7958418B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Christian Pacha · Birkenfeld, DE
• Stephan Henzler · Munich, DE
• Siegmar Koppe · Laatzen, DE
• Joerg Berthold · Munich, DE

Key dates

• Filing date: Feb 8, 2008
• Grant date: Jun 7, 2011
• Expiry date: May 13, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2029/3202
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A circuit arrangement may include a scan test input stage having a test input for receiving a test signal, wherein the scan test input stage can be switched in high-impedance state; a data input stage having a data input for receiving a data signal, wherein the data input stage can be switched in high-impedance state. The circuit arrangement may further include a latch coupled to at least one output of the scan test input stage and to at least one output of the data input stage; and a drive circuit, which is configured to generate a pulsed clock signal for the data input stage and a signal for driving the scan test input stage.