Digital satellite receiver controller
US7961083B2 · kind B2 · utility
0Cited by
17References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2007 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Apr 13, 2030 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB60R1/082
- WIPO fieldTransport
- WIPO sectorMechanical engineering
Abstract
This disclosure relates to a satellite receiver controller having a digital to analog circuit with an output having a dynamic range offset voltage, which is adjusted in synchronization with a signal pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.