Time-interleaved analog-to-digital converter
US7961123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2009 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Oct 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A time-interleaved (TI) analog-to-digital converter (ADC) is provided. The TI ADC generally comprises a clock generator, two or more ADCs, adjustable delay elements, and an estimator. The clock generator generates clock signals. Each ADC is associated with at least one of the clock signals so as to sample an input signal that is generally wide-sense stationary at sampling instants, where correlation function exist between samples from a two or more of the ADCs that is a function of the time differences between associated sampling instants. The estimator is coupled to each of the adjustable delay elements and each of the ADCs so as to calculate the correlation function and adjust the adjustable delay elements to account for sampling mismatch between the ADCs based at least in part on the correlation function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.