Electronic dispersion compensation utilizing interleaved architecture and channel identification for assisting timing recovery
US7961781B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2007 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Sep 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03509
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.