Inventor · Austin, TX, US

Vivek Telang

18Patents
5h-index
19Co-inventors
63Inventor score

Filing activity: Apr 23, 1999 → Jul 9, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6577689B1 Timing recovery system for a 10 BASE-T/100 BASE-T ethernet physical layer line interface Electricity 15 Expired
US7525462B2 Gain control for interleaved analog-to-digital conversion for electronic dispersion compensation Electricity 13 Active
US7525470B2 Phase control for interleaved analog-to-digital conversion for electronic dispersion compensation Electricity 7 Active
US7830987B2 Electronic dispersion compensation utilizing interleaved architecture and channel identification for assisting timing recovery Electricity 6 Active
US7961781B2 Electronic dispersion compensation utilizing interleaved architecture and channel identification for assisting timing recovery Electricity 6 Active
US8130786B2 Multi-rate backplane transceiver Electricity 5 Active
US9338040B2 Use of multi-level modulation signaling for short reach data communications Electricity 4 Active
US8964818B2 Use of multi-level modulation signaling for short reach data communications Electricity 3 Active
US9900268B2 System, method and apparatus for multi-lane auto-negotiation over reduced lane media Electricity 2 Active
US10652008B2 Overclocked line rate for communication with PHY Interfaces Emerging Cross-Sectional Technologies 1 Active
US8964907B2 Multi-protocol communications receiver with shared analog front-end Electricity 1 Active
US8442159B2 Multi-protocol communications receiver with shared analog front-end Electricity 1 Active
US8913706B2 Multi-channel multi-protocol transceiver with independent channel configuration using single frequency reference clock source Electricity 1 Active
US8369453B2 Adaptive offset adjustment algorithm Electricity 1 Active
US8428111B2 Crosstalk emission management Electricity 1 Active
US8948237B2 Adaptive offset adjustment algorithm Electricity 0 Active
US10069620B2 Overclocked line rate for communication with PHY interfaces Emerging Cross-Sectional Technologies 0 Active
US9304950B2 Overclocked line rate for communication with PHY interfaces Emerging Cross-Sectional Technologies 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.