Silicon wafer having good intrinsic getterability and method for its production
US7964275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2007 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jan 15, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/26
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Silicon wafers in the entire volume of which crystal lattice vacancies are the prevalent point defect type, have a rotationally symmetric region whose width is at least 80% of the wafer radius, crystal lattice vacancy agglomerates of at least 30 nm in a density ≦6·103 cm−3, crystal lattice vacancy agglomerates of from 10 nm to 30 nm in a density of 1·105 cm−3 to 3·107 cm−3, OSF seeds in a density of 0 to 10 cm−2, and an average bulk BMD density of 5·108 cm−3 to 5·109 cm−3, which varies at most by a factor of 10 radially over the entire silicon wafer, and a BMD-free layer on the front side, wherein the first BMD is found at a depth of at least 5 μm and on average at a depth of at least 8 μm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.