High voltage tolerance circuit
US7965481B2 · kind B2 · utility
2Cited by
5References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2008 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jun 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/1201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high voltage tolerance circuit includes a first transistor, a second transistor, a third transistor, and a latch-up device. The first transistor and the second transistor are controlled by a control signal. The gate of the third transistor is coupled to a ground through the first transistor. The gate of the third transistor is coupled to an I/O pad through the second transistor. The third transistor is coupled between a power supply and a node. The latch-up device is coupled between the node and the I/O pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.