Patent · US Active

Method for repairing a neighborhood of rows in a memory array using a patch table

US7966518B2 · kind B2 · utility

6Cited by
69References
16Claims
0Family size

Assignee

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Key dates

Filing dateMay 15, 2007
Grant dateJun 21, 2011
Priority date
Expiry dateOct 20, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C29/804
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N−1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N−1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N−1, N, and N+1.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.