Digital reliability monitor having autonomic repair and notification capability
US7966537B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2009 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | Jul 17, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for preventing failure in an integrated circuit. The circuit including: an original circuit; one or more redundant circuits; and a repair processor, including a clock cycle counter configured to count pulses of a pulsed signal, the repair processor configured to (a) replace the original circuit with a first redundant circuit or (b) configured to select another redundant circuit, the selection in sequence from a second redundant circuit to a last redundant circuit, and to replace a previously selected redundant circuit with the selected redundant circuit each time the cycle counter reaches a predetermined count of a set of pre-determined cycle counts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.