Patent · US Active

Capacitance-to-voltage interface circuit with shared capacitor bank for offsetting and analog-to-digital conversion

US7969167B2 · kind B2 · utility

9Cited by
18References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 28, 2009
Grant dateJun 28, 2011
Priority date—
Expiry dateJan 13, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01D5/24
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A capacitance-to-voltage interface circuit includes a capacitive sensing circuit, an amplification circuit adapted for selective coupling to the capacitive sensing circuit, a capacitor bank comprising a plurality of binary-weighted capacitors, and a switching architecture associated with the capacitive sensing circuit, the amplification circuit, and the capacitor bank. The switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases, including an amplification phase and an analog-to-digital conversion phase. During the amplification phase, the capacitor bank is utilized for offsetting capacitance of the amplification circuit. During the analog-to-digital conversion phase, the capacitor bank is utilized in a successive approximation register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.