Patent · US Active

Semiconductor integrated circuit

US7969180B1 · kind B1 · utility

3Cited by
4References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 15, 2010
Grant dateJun 28, 2011
Priority date—
Expiry dateFeb 15, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318513
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A semiconductor integrated circuit includes first and second bump pads configured to output data, a probe test pad coupled to the first bump pad, and a pipe latch unit configured to selectively transfer data loaded on first and second data lines to one of the first and second bump pads in response to a pipe output dividing signal during a normal mode, and sequentially transfer the data loaded on the first and second data lines to the probe test pad in response to the pipe output dividing signal during a test mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.